Note: The job is a remote job and is open to candidates in USA. TYLsemi is a company focused on building chiplet infrastructure IP for AI and HPC systems. The Firmware Architect will lead the firmware and embedded software architecture for TYLsemi chiplets, ensuring seamless hardware-to-software integration and driving cross-functional collaboration to meet customer needs.
Responsibilities
- Own the end-to-end firmware/embedded-software architecture for TYLsemi chiplets
- Define the firmware/hardware interface together with the Chip Architects for a seamless HW-to-SW handoff; define the MCU subsystem (MCU SS) architecture from the firmware point of view; and define the chip's debug interface and debug features
- On-die: boot and secure boot, link sequencing, PCIe/CXL controller configuration and enumeration, address-translation (NTB/ATT) setup, MSI-X and AER handling, reset/FLR, power management, telemetry, and in-field firmware update
- Host-side: kernel drivers, the device-virtualization/transparency shim (synthetic PCIe device, VFIO-mdev-class), management libraries/APIs, and IOMMU (VT-d/SMMU) coordination
- Define the hardware/software boundary with architecture and RTL — datapath (credit, ordering, merge/split, address-translation execution) in RTL; control plane in firmware — and own register maps and UCIe sideband/mailbox protocols
- Define a unified flow for firmware development and DV test cases, with a single source of truth shared across firmware and DV (register models, stimulus, and sequences), and drive HW/SW co-verification
- Stay hands-on through first silicon
- Drive pre-silicon firmware and host-software development on emulation, and virtual platforms, and lead post-silicon bring-up and debug
- Stand up the firmware engineering infrastructure: CI, automated and HIL testing, requirements traceability, secure-development practices (secure boot, attestation, key management), and the RAS/error-handling and fault-attribution strategy
- Define firmware release, quality, and security criteria across products and customers
- Be the technical bridge between firmware/software and architecture, RTL, DV, PHY/IP vendors and program management — bringing software feasibility into hardware decisions early
- Work directly with customers: compute-SoC partners on PCIe/CXL enablement, ATE/SLT integrators on the firmware and management libraries
- Set technical direction, roadmap, and clear subsystem ownership (boot/security, PCIe/CXL management, host drivers and virtualization, RAS/telemetry)
Skills
- BS/MS in Electrical / Computer Engineering or Computer Science
- 12+ years of embedded firmware development, with at least 5 years in silicon-level bring-up and validation of high-speed interface IPs
- Working knowledge of design verification (DV) and HW/SW co-simulation / co-verification flows, and the ability to define a unified firmware + DV test flow with a single source of truth
- Expert-level C and assembly for resource-constrained embedded CPUs (RISC-V or Arm Cortex-M/R class); strong debugging skills using JTAG/OpenOCD, trace, and logic analysers
- Deep PCIe expertise: link-training state machine, equalization, speed-change sequences, LTSSM register-level behaviour
- Hands-on experience with HPC compute SoC firmware ecosystems — UEFI/BIOS bring-up, ACPI table authoring, SMBus/I2C/MCTP platform management, VT-d/IOMMU configuration — on HPC platforms
- Solid understanding of x86 server platform boot flow: PCIe enumeration, ROM interaction, and PCIe error-recovery paths (AER, DPC)
- Experience with secure-boot architectures, code-signing flows, and OTA update mechanisms on embedded targets
- Comfortable working at the hardware-software boundary: reading RTL, memory-mapped register specs, and waveforms from simulation or a logic analyser
- CXL 2.0/3.0 firmware experience: HDM decoder programming, CXL IDE, DVSEC, BISnp coordination
- UCIe / die-to-die sideband firmware experience (RDI/FDI parameter negotiation, sideband messaging)
- SPDM (DSP0274) and CMA device-attestation implementation experience
- Familiarity with PLDM for firmware update (DSP0267) and platform telemetry (DSP0248)
- ATE scripting background — Teradyne UltraFLEX / Advantest T2000 board-level bring-up scripts
- Exposure to chiplet packaging concepts (UCIe, EMIB, CoWoS) and multi-die power-sequencing considerations
- Kernel-mode driver or UEFI DXE driver development experience
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